1. Field
This disclosure relates generally to memories, and more specifically, to a memory having a dummy bitline for timing control.
2. Related Art
Configurable or compiled memories allow users to specify words and bits per word within bounded ranges that result in memory configurations that span a wide range of possible physical wordline rows and bitline columns combinations and thus the physical dimensions of the instances vary significantly as well. The key to achieving maximum speed while maintaining robust operation is to be able to keep nearly constant sense margin over all possible configurations, which meets a target minimum value that ensures that data is read properly. Since process models are not exactly accurate and since the manufacturing process itself may drift or vary, it is additionally desirable to be able to adjust the sense margin if necessary without mask changes and design changes in the circuitry to be built.